This invention relates to a video RAM write control apparatus which is used for graphic display.
Generally, a video RAM including memories of the dynamic type is used to display characters and figures as dot patterns on a CRT display. The CRT display is directly connected to the video RAM and, by writing the dot pattern data into the video RAM, dot patterns are displayed on the CRT display. In the case of graphic display, one-bit data in the video RAM generally corresponds to one dot information displayed on the CRT screen. If video RAM is so addressed that data is accessed on a bit unit basis, the dot pattern data will easily be written into the video RAM. However, the addressing space of the video RAM becomes very large. Moreover, the video RAM must be comprised of memories from which data is read at high speed, since the timing at which one-bit data is read from the video RAM must be synchronized with the display of one dot on the CRT screen. Furthermore, a complicated driving circuit must be provided for the video RAM. Therefore, in general, several-bit data for several dots is stored in the video RAM at the corresponding address. For example, one-byte data for eight dots which are horizontally sequential on the CRT screen is stored at the corresponding address of the video RAM in which every word consists of 8-bits. The video RAM is accessed on a word unit basis so that the word readout from it is converted to serial data until the next word is accessed. A conventional video RAM write control method by which the video RAM is accessed on a word unit basis may be described as follows. By definition, the CRT screen consists of 256 dots in the vertical (Y) direction and 256 dots in the horizontal (X) direction and a dot on the screen is expressed by a location coordinate (X, Y).
The case wherein the dot at the location coordinate (100, 90) is lit up will be described. A memory capacity of 256.times.256=65,536 bits is required for the video RAM to store all of the dots on the screen by making one dot correspond with one bit. The video RAM stores 8-bit pattern data corresponding to 8 dots sequential in X direction as one word. Since the memory is accessed on a one byte (8 bits) unit basis, the physical addressing spaces of the video RAM are 8,192 (=65,536.div.8). Therefore, an address signal of the video RAM requires 13 bits. In this example, 8-bit display data including dot pattern data at a location coordinate (100, 90) is stored in "0101101001100" address of the video RAM. The upper eight bits of that memory address are 8-bit binary numbers indicating the vertical location Y (=90) of the dot. The lower five bits are upper five bits of the 8-bit binary numbers representing the horizontal location X (= 100). The pattern data "00001000" may be written into the video RAM at the memory address "0101101001100". This pattern data is produced by allotting data "1" to the fifth bit from the MSB according to the lower three bits of the 8-bit binary numbers representing the location coordinate Y (=90). The dot at the location of (100, 90) is lit up and displayed by this data writing. To display characters and figures by a set of dots, the data of each dot may be written into the video RAM by the above-mentioned method.
The data of eight dots which are continuous in the raster scanning direction, i.e. in the horizontal direction of the CRT is written into the video RAM at the corresponding address. Thus, in the case of drawing a straight line horizontally, or other similar cases, the adjacent dots are simultaneously displayed and the dot pattern data of both dots may have to be written at the common address. In this case, as described above, if the dot pattern data is merely written at the address obtained from the location coordinate, the dot pattern data which has previously been written at the address will be erased by the data that is later written at this address, so that the dots which are horizontally continuous cannot be displayed. Therefore, if it is necessary to write a plurality of dot pattern data at the common address in the video RAM, the dot pattern data which has already been written at the common address is once read out when new dot pattern data is written, the OR operation of this dot pattern data read out and the new data is executed, and its result is written. This could occur when new dots are further displayed horizontally within eight dots from the dot which has already been displayed, in addition to the case wherein the two adjacent dots are displayed.
Since this OR operation has been executed by a software, the conventional video RAM writing method causes the software to be under a heavy burden and a high-speed operation is impossible.
Moreover, in the display unit controlled by a video RAM, if one desires to increase the number of display dots on the screen and to elevate a resolution, the capacity of the video RAM as well as the amount of data to be processed will increase, so that this may inconveniently invite reduction of the display speed.
Furthermore, although the display locations of character patterns have been predetermined, it is desired that the character locations be changed, i.e., that the character locations be shifted by several dots. The software amount is excessively increased and, therefore, the processing speed is reduced against such a complicated pattern processing that the character locations are shifted by several dots. As described above, the conventional video RAM writing method greatly depends upon the software and cannot cope with complicated processings to write data into the RAM at a high speed.